: Data buses play a key role in the aircraft's avionic architecture. Capabilities and restrictions of communication between avionics componenes is determined by the databus in use. Nowadays high speed serial data buses have made it possible to design and implement high level avionic functions by cooperative operation of avionics systems.The MIL-STD-1553B databus is one of the most popular and widely used avionics data buses. Though, a long time has passed since its first introduction, it is still used in many military and civil aircrafts due to its high reliability and noise immunity. The 1553B network interface is required by any component that is supposed to communicate with other components over the network. One solution for the network interface of the systems is the commercially available 1553B integrated circuits. The other solution is to design the network interface as an IP cores and implement it on an FPGA chip. Low costs, simple upgrade procedure, small footprint, easy evaluation and verification and future-proof designs have made the IP core a popular solution for many designers. In this project the design and implementation of a 1553B IP core was followed to provide the national aerospace industries with a low cost and costumizable solution. The IP design is based on the 1553B related standard documents and the conceptual designs of the commercially available IP cores. The units of the designed network interface were implemented by hardware description language (VHDL) by an optimized and reliable approach. The main units of the interface are Manchester encoder/decoder and protocol controller. Two separate protocol controllers were designed for Bus Controller and Remote Terminal. Furthermore, a method was proposed for on demand service to remote terminals using the "Service Request" bit in the status word. The performance of the designed 1553B network interface was practically examined using three personal computers as remote terminals and the bus controller. The results confirmed that the designed 1553B IP core can successfully satisfy the standard requirements. By implementing this core on the FPGA chip of an avionic system it can be connected to the 1553 databus by minor hardware modifications. Keywords: MIL-STD-1553B, IP Core, Bus Controller, Remote Terminal
