With the increasing use of multi-core systems, utilizing the maximum capability of these processors seems very critical. In order to exploit maximum power from the processing cores, having insight about the bottlenecks of the parallel program is required. Fortunately, these bottlenecks and also relevant performance parameters could be identified by the inherent communication and computation patterns of the program under test. There are various methods currently available to detect communication patterns inside a parallel program. Runtime simulation, code instrumentation and hardware counter analysis are some of these techniques. However, the majority of them are focused on HPC applications developed on distributed-memory platforms. They also neglect the unique communication characteristics of shared-memory systems and impose a great deal of overhead (both memory and runtime) with average accuracy while analyzing the application. The main purpose of this thesis is to propose a novel method to automatically detect parallel patterns inside the shared-memory applications. First, the application's inter-thread communication information will be collected using LLVM instrumentation. In order to find dependencies among thread efficiently, a new data structure named "Asymmetric Signature Memory" is proposed which requires less than 200MB of memory in order to be used in the analysis. Having predictable memory footprint and low runtime overhead are the main advantages. In addition, by discerning loops inside the target program and producing multi-layer communication matrix, multiple patterns could be identified in the target program. By using supervised learning با تشکر