Multicarrier modulation systems play an important role in digital and especially in wireless communication due to their robustness against channel multipath fading effects and thus they are still the first option for new generations of wireless communications. With the growing use of the Internet of Things machine to machine communications and the importance of issues such as cognitive radio and energy harvesting, there are new requirements for wireless communication systems. Amongtheserequirementwecareferto low out of band radiation for opportunistic access to the spectrum and low sensitivity to time and frequency offset to workioftynchronizatioin orderto saveenergy. GFDM as a multicarrier modulation by applying frequency domain filter to subcarriers reduces out of band radiation, applying of non-rectangular filters in frequency domain causes lost of orthogonality and increase the self interference of subcarriers. The zeroforcing receiver compensates this interference by employing inverse transmitter filter which reduces system sensitivity to frequency offset due to lack of orthogonality constraint. There is no zeroforcing receiver for subsymbols with even number because it leads to Fourier transform with odd number of points and thus the optimal DFT/IDFT based implementation structure can not be employed. In this thesis we propose a method in which by applying some changes in the DFT/IDFT structure it will be possible to use large Fourier transform with power of two despite odd number of subsymbols. This method makes it possible to implement the structure by using FFT algorithm which leads to reduction of resources and also results in consistency between GFDM and SC_FDMA structures. litting of one GFDM symbol into several time subsymbols brings about the need for larger Fourier transform. To avoid degradation of the signal SQNR we have to increase the size of the Fourier transform which leads to increase of the word length and thus the required resources for implementation is doubled. Applying appropriate scaling to each Fourier transform stage we can prevent each word from overflowing and underflowing and hence keep the signal SQNR at desirable level with shorter word length. Determination of the word length and optimal scaling method is related to the algorithm of floating-point to fixed-point conversion that takes a lot of design time. The use of automated methods therefore helps to significantly speed up the design and find the optimal word length and scaling method. In this thesis, by using the capabilty of the MATLAB software to automatically convert the floating-point to fixed-point format we can achieve the optimal word length and proper scaling factor for the GFDM modulator with LTE standard parameters. The effect of scaling on the system performance and required resources are discussed. Applying fixed scaleing with 16-bit word length causes 48% reduction in the number of slice LUTs, block RAMs and registers, and a 75% reduction in the number of DSP blocks compared to 32-bit implementation, while increases the out of band emission by 30%. Finally, the accuracy of scaling is verified in practice by implementing the hardware in System Generator and putting ZedBoard hardware with Zynq7020 chip in the Simulink loop. Keywords: GFDM, FPGA, ZeroForcing, Scaling