Undoubtedly, an important tool in digital signal processing is the use of transform methods. There are various transforms that help the extraction of considerable amount of information from a signal. Usually, the obtained information could not be detected in the spatial or time domains. Thus, basic transforms only unmask undetectable facets of a signal. Gradually, more powerful transforms have been introduced to obtain the signal properties in the specified time or space coordinated. Wavelet transform is one such transform. Design and implementation of transforms due to their vast applications are necessary. The bottlenecks of their design are more pronounced when it comes to the real-time properties and resource utilization rate of a transform. Contourlet transform (CT) is a powerful and contemporary tool in extracting vital information from an image. It is composed of two stages of Laplacian Pyramid (LP) and Directional Filter Bank (DFB). In the first stage, an input image is delivered to LP and then low and high frequency coefficients are hierarchically calculated. LP is composed of decimation and interpolation parts. Input image is given to the decimation part which produces the low frequency coefficients. Subsequently, the resultant coefficients are processed by the interpolation part and an estimated version of the input image is calculated. Afterward, the high frequency coefficients are obtained by subtracting the estimated image from the original one. Quantization analysis is a powerful method to determine the width of the registers and FIFO cells which consume a large quantity of flip flops. In an FPGA-based design, the need for large number of flip flops leads to the occupation of many logic elements and large amount of power dissipation. Also, the aforementioned method ascertains the mathematical accuracy of outputs. For this reason, we start with the quantization of the filter coefficients of the decimation part and keep the rest of the stages in an ideal form. Under these circumstances we use MSE, to test the quantization of the low frequency coefficients. Then the proper number of bits for a desired MSE can be figured out. After the quantization of the decimation coefficients, we can go to the interpolation part in the same way. In previous researches that are available in the literature, there are some major drawbacks which cause some computational redundancy. Therefore, in this thesis a new implementation of the Laplacian Pyramid (LP) algorithm is proposed which uses the polyphase representation and the noble identities. These are implemented by a new pipeline architecture. Our approach saves a large number of mathematical operations and results in the reduction of power consumption. Key Words CT Transform, Laplacian Pyramid, Directional Filter Bank, Hardware Implementation, Resources, FPGA.