Today, with advances in semiconductor technology, the number of processing elements in a system-on-chip (SOC) is increased. Communication architecture of such systems is based on the bus. Hence, by increasing the number of processing components and due to the lack of bus performance and expandability, the network on-chip or NOC concept as an efficient and scalable inter-chip communication plan, to overcome the buses problems has been proposed. One of the major challenges in the NOC research is the problem of mapping tasks of an application on the homogeneous or even heterogeneous processing cores connected to the network routers. On the other hand, one of the most versatile applications is embedded applications with real-time requirements. In many previous works, the problem of mapping has been investigated for homogeneous processing cores. In other words, although heterogeneous cores are closer to the real application, most of the proposed schemes have ignored this property. In addition, the the characteristic of real-time application wasn't the main focus of the previous research works. One of the other challenges in the network on-chip is the power consumption in the NOC. In this thesis, at first a survey of the work done in the last one decade in the domain of application mapping is discussed then a new application mapping for hard real time application for heterogeneous core based on multi objective genetic algorithm is proposed. Since, optimal solution is a NP-hard problem, we use genetic algorithm to achieve semi-optimal solutions. In addition, the proposed method prevents infeasible solutions being produced in new generations. This strategy cause that the proposed scheme converge to the pareto-optimal solution faster than other schemes. Experimental results are presented and evaluated using several well-known metrics as well as a new metric. This shows the effectiveness of the proposed method compared to other approaches. Keywords: Network on-chip, hard real-time application, mapping, multi-objective genetic algorithm